1. Field of the Invention
The present invention relates to a method for producing an image pickup apparatus and a method for producing a semiconductor apparatus, the methods including a process of cutting a joined wafer where a plurality of image pickup chips (semiconductor chips) are bonded to a support substrate.
2. Description of the Related Art
A chip size package (CSP) technology has been used for downsizing semiconductor apparatuses. In the CSP, in a semiconductor chip where a semiconductor circuit section is formed on a first main face, a through-hole interconnection is formed up to a second main face, and an external connection terminal on the second main face is connected to an interconnection board.
Here, in a small image pickup apparatus, a transparent support member that protects a light receiving section that is the semiconductor circuit section is joined to a first main face of an image pickup chip on which the light receiving section is formed. A wafer level chip size package (WL-CSP) technology has been used for collectively fabricating a plurality of image pickup apparatuses. In the WL-CSP, an image pickup chip substrate on which a plurality of light receiving sections are formed, and a transparent support substrate are subjected to machining such as formation of through-hole interconnections in a joined wafer state in which the image pickup chip substrate and the transparent support substrate are bonded via an adhesive layer. After that, the joined wafer is individualized into individual image pickup apparatuses.
In the conventional WL-CSP, however, when the image pickup chip substrate has a low yield rate of image pickup chips, an image pickup chip with a defective light receiving section is also machined as an image pickup apparatus. Thus, a production cost increases. Also, along with an increase in a diameter of a semiconductor wafer, all machining equipment needs to be compatible with a large diameter. Thus, an equipment investment amount increases, and a production cost increases, so that productivity is lowered.
Note that Japanese Patent Application Laid-Open Publication No. 2011-243596 discloses a method for producing a package component by a CSP method in which semiconductor chips mounted on a mounting face of a silicon wafer are sealed by a sealing resin, and the silicon wafer is then polished or the like from an opposite face to the mounting face, and further individualized into individual package components.
That is, in the above production method, the semiconductor chips are not machined, but the silicon wafer is machined to become an interposer for the semiconductor chips.
In the method for producing the package component described above, a plurality of semiconductor ships are mounted, and polishing machining and the like are performed for a surface sealed by a sealing resin. There is a possibility that machining cannot be performed to obtain uniform thickness depending on bonding positions of the semiconductor chips, and a yield rate may be reduced.